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Experienced Logic Design Engineer
Intel
Intel Foundry Senior Customer Quality Engineer
Intel
Graduate Talent (Operations Research Engineer)
Intel
Security Software Development Engineer
Intel
Info Security DevSecOps Engineer
Intel
Software Engineering Intern for Debug Tools
Intel
Experienced Logic Design Engineer
Intel
Intel Foundry Senior Customer Quality Engineer
Intel
Graduate Talent (Operations Research Engineer)
Intel
Security Software Development Engineer
Intel
Info Security DevSecOps Engineer
Intel
Software Engineering Intern for Debug Tools
Intel
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page 1 / 11
#
role
company
location
country
posted
01
Experienced Logic Design Engineer
Intel
Israel, Petah-Tikva
Israel
O
1d
Senior
perl
python
systemverilog
02
Intel Foundry Senior Customer Quality Engineer
Intel
Malaysia, Penang
Malaysia
1d
03
Graduate Talent (Operations Research Engineer)
Intel
Malaysia, Penang
Malaysia
1d
04
Security Software Development Engineer
Intel
Israel, Haifa
Israel
1d
05
Info Security DevSecOps Engineer
Intel
India, Bangalore
India
1d
06
Software Engineering Intern for Debug Tools
Intel
Mexico, Guadalajara
Mexico
1d
07
Yield Development Engineering Manager-Strategic Programs
Intel
US, Oregon, Hillsboro / US, Arizona, Phoenix
United States
1d
08
EDA Tools Software Engineer
Intel
US, Arizona, Phoenix / US, California, Folsom / US, California, San Jose
United States
2d
Senior
python
perl
tcl
09
AI Frameworks Engineer
Intel
US, California, Santa Clara / US, Texas, Austin / US, Oregon, Hillsboro
United States
2d
Mid
python
c++
cuda
10
Graduate Talent (Server Infrastructure and Test Engineer)
Intel
Malaysia, Kulim
Malaysia
O
2d
Mid
python
c++
c
11
SoC Logic Design Engineer
Intel
US, Oregon, Hillsboro / US, California, Santa Clara / US, Texas, Austin
United States
2d
Senior
perl
systemverilog
python
12
CPU Microcode Design Engineer
Intel
US, Texas, Austin / US, Oregon, Hillsboro
United States
O
2d
Mid
c
c++
perl
13
Silicon Packaging Design Engineer
Intel
Malaysia, Penang / Malaysia, Kulim
Malaysia
O
2d
Mid
cadence apd
mentor xpedition
electrical design analysis
14
Yield Development Engineering Manager-Strategic Programs
Intel
US, Oregon, Hillsboro
United States
2d
15
Senior Design Engineer – AI SoC Development
Intel
US, California, Folsom / US, Oregon, Hillsboro / US, California, Santa Clara / US, Texas, Austin
United States
3d
Senior
verilog
systemverilog
python
16
Design Engineer – AI SoC Development
Intel
US, California, Folsom / US, Oregon, Hillsboro / US, California, Santa Clara / US, Texas, Austin
United States
O
3d
Mid
verilog
systemverilog
hdl
17
GPU Software Development Engineer
Intel
PRC, Shanghai
—
O
3d
Mid
python
c
c++
18
Facilities Engineering Undergraduate Intern
Intel
US, Oregon, Hillsboro / US, Arizona, Phoenix
United States
O
3d
Intern
sql
excel
power bi
19
Mid-level Physical Design Engineer CPU
Intel
US, Oregon, Hillsboro
United States
3d
Mid
tcl
python
synopsys
20
Junior Physical Design Engineer (CPU)
Intel
US, Oregon, Hillsboro
United States
O
3d
Junior
tcl
python
synopsys
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Yield Development Engineering Manager-Strategic Programs