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Experienced Security Software development Engineer
Intel
Design Automation Engineer (TFM/EDA)
Intel
Memory Circuit Design Engineer
Intel
Module Engineering Undergraduate Intern
Intel
Principal Engineer, Hybrid Bonding Module
Intel
Analytics and AI Solution Architect
Intel
Experienced Security Software development Engineer
Intel
Design Automation Engineer (TFM/EDA)
Intel
Memory Circuit Design Engineer
Intel
Module Engineering Undergraduate Intern
Intel
Principal Engineer, Hybrid Bonding Module
Intel
Analytics and AI Solution Architect
Intel
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132 results
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role
company
location
country
posted
101
Experienced Security Software development Engineer
Intel
Israel, Haifa
Israel
H
1mo
Senior
c
c++
java
102
Design Automation Engineer (TFM/EDA)
Intel
US, California, Folsom / US, Oregon, Hillsboro / US, California, Santa Clara / US, Arizona, Phoenix
United States
O
1mo
Senior
bash
perl
python
103
Memory Circuit Design Engineer
Intel
US, Texas, Austin
United States
O
1mo
Senior
c++
cmos
digital logic
104
Module Engineering Undergraduate Intern
Intel
Malaysia, Kulim
Malaysia
O
1mo
Intern
statistics
process control
mathematics
105
Principal Engineer, Hybrid Bonding Module
Intel
US, Oregon, Hillsboro
United States
1mo
hybrid bonding
wafer bonding
advanced packaging
106
Analytics and AI Solution Architect
Intel
US, Arizona, Phoenix / US, Oregon, Hillsboro / US, California, Folsom / US, California, Santa Clara
United States
1mo
Senior
javascript
aws
google cloud
107
Principal Analog Circuit Design Engineer - SerDes
Intel
Virtual Canada
—
H
1mo
matlab
python
tcl
108
CPU Circuit Design Engineer
Intel
Israel, Haifa / Israel, Petah-Tikva
Israel
H
1mo
Mid
c
sql
eda tools
109
Principal Analog Circuit Design Engineer - SerDes
Intel
Virtual Canada
—
H
1mo
matlab
python
tcl
110
Senior Physical Design Integration Engineer
Intel
US, California, Folsom / US, California, Santa Clara / US, Texas, Austin
United States
O
2mo
Senior
perl
tcl
unix
111
Yield and Process Control Automation Engineer
Intel
US, Arizona, Phoenix
United States
2mo
Senior
sql
c++
python
112
Logic Design Engineer
Intel
Israel, Haifa
Israel
O
2mo
Senior
systemverilog
verilog
digital design
113
Mixed Signal Logic Design Engineer
Intel
Malaysia, Penang
Malaysia
H
2mo
Mid
c++
verilog
vhdl
114
Experienced IP Logic Design Engineer
Intel
Costa Rica, San Jose
Costa Rica
O
2mo
Senior
system verilog
verilog
lint tools
115
Senior AI Algorithm Engineer in oneDNN
Intel
US, Oregon, Hillsboro / US, California, Santa Clara
United States
H
2mo
Senior
c++
gpu
opencl
116
Principal Analog Circuit Design Engineer - SerDes
Intel
US, California, Santa Clara / US, Arizona, Phoenix / US, Oregon, Hillsboro
United States
2mo
matlab
python
tcl
117
Lead Senior Design Engineer – AI SoC Development
Intel
US, California, Folsom / US, California, Santa Clara / US, Texas, Austin
United States
O
2mo
python
tcl
verilog
118
Senior AI Software Architect - Runtime
Intel
US, Oregon, Hillsboro / US, California, Santa Clara / US, Texas, Austin
United States
2mo
Senior
c
c++
python
119
Analog Circuit Design Engineer
Intel
India, Bangalore
India
O
2mo
Senior
cadence virtuoso
spice simulators
drc
120
Analog Circuit Design Engineer
Intel
India, Bangalore
India
O
2mo
Senior
matlab
python
c++
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Design Automation Engineer (TFM/EDA)