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Analog Layout Senior Staff Engineer
Marvell
Hardware & Silicon Validation Senior Staff Engineer
Marvell
Hardware & Silicon Validation Senior Staff Engineer
Marvell
Hardware & Silicon Validation Senior Staff Engineer
Marvell
Engineering IP Program Manager, Sr. Principal
Marvell
Field Application Engineer Intern (Software)
Marvell
Analog Layout Senior Staff Engineer
Marvell
Hardware & Silicon Validation Senior Staff Engineer
Marvell
Hardware & Silicon Validation Senior Staff Engineer
Marvell
Hardware & Silicon Validation Senior Staff Engineer
Marvell
Engineering IP Program Manager, Sr. Principal
Marvell
Field Application Engineer Intern (Software)
Marvell
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role
company
location
country
posted
121
Analog Layout Senior Staff Engineer
Marvell
Bangalore
India
1mo
Staff
perl
tcl
cadence virtuoso
122
Hardware & Silicon Validation Senior Staff Engineer
Marvell
Santa Clara, CA
United States
1mo
Staff
python
c
c++
123
Hardware & Silicon Validation Senior Staff Engineer
Marvell
Westborough, MA
United States
1mo
Senior
python
c
c++
124
Hardware & Silicon Validation Senior Staff Engineer
Marvell
Santa Clara, CA
United States
1mo
Staff
c
python
sql
125
Engineering IP Program Manager, Sr. Principal
Marvell
US-NY - Hudson Valley / Santa Clara, CA
United States
1mo
Senior
c
c++
sql
126
Field Application Engineer Intern (Software)
Marvell
Shanghai
China
O
1mo
Intern
c
python
127
Senior Principal Engineer, Architecture ASIC / System
Marvell
Toronto, Canada / Ottawa, Canada
Canada
O
1mo
Senior
c++
c
java
128
Analog Design Intern - Master's Degree (Quarter Schools / Fall 2026 Start Dates)
Marvell
Westlake Village, CA
United States
1mo
Intern
eda cad tools
analog custom layout
transistor level design
129
Senior Principal Engineer, Micro-architecture and RTL
Marvell
Santa Clara, CA
United States
1mo
Senior
system verilog
universal verification methodology
system verilog assertions
130
Analog Layout Staff Engineer
Marvell
Toronto, Canada
Canada
O
1mo
Staff
cadence virtuoso
electrical engineering
high-speed analog circuits
131
ASIC Architect
Marvell
Santa Clara, CA
United States
1mo
c++
c
sql
132
Senior Staff Engineer, ASIC Design/Implementation - LEC/STA/Power Analysis
Marvell
San Diego, CA
United States
1mo
Senior
tcl
python
sql
133
Senior Staff Engineer, ASIC/VLSI Synthesis and Design
Marvell
San Diego, CA
United States
1mo
Senior
c
tcl
python
134
Principal Engineer, ASIC/VLSI Synthesis and Design
Marvell
San Diego, CA
United States
1mo
Senior
c
tcl
python
135
Staff Engineer, ASIC Design/Implementation - LEC/STA/Power Analysis
Marvell
San Diego, CA
United States
1mo
Staff
tcl
python
primetime
136
Staff Engineer, ASIC/VLSI Synthesis and Design
Marvell
San Diego, CA
United States
1mo
Staff
c
tcl
python
137
Principal Engineer, ASIC Design/Implementation - LEC/STA/Power Analysis
Marvell
San Diego, CA
United States
1mo
Senior
tcl
python
sql
138
Senior Principal Digital IC Design Engineer
Marvell
Santa Clara, CA
United States
1mo
Senior
verilog
systemverilog
perl
139
Senior Staff Engineer, ASIC/VLSI Synthesis and Design
Marvell
Irvine, CA / US-CA - San Diego
United States
1mo
Senior
c
tcl
python
140
Senior Staff Engineer, ASIC Design/Implementation -- LEC/STA/Power Analysis
Marvell
Irvine, CA / US-CA - San Diego
United States
1mo
Senior
tcl
python
primetime
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